Chapter 2 Instruction: language of the computer

Synchronization

two processors accessing (sharing) the same area of memory

  • DATA RACE: if p1 and p2 don't sync->

  • hardware support reuired for lock/unlock mechanism

    • atomic read/write memory operation (no other access to the location between R/W) -atomic exchange / swap
      • atomically change the register/memory value atomically
      • or atomic pairs of instructions could work

  • support int MIPS

    • load linked: 11 rt, offest(rs)

    • store conditional: sc rt, offset(rs)A

      • returns 1 in rt if success
      • return 0 in rt if failed (location is changed)
    try: 
move $t0, $s4
ll $t1, 0($s1)
sc $t0, 0($s1)
beq $t0, $0, try
move $s4, $t1

  • Translation and startup compiler - assemblre - linker - loader

    • static linking (linked files are statically determined)

  • assembler pseudoinstruction (not machine instruction)

    • blt, bgt, ble, bge, li, move (unwinded into slti or similar instruction)

  • object file (module)

    • header
    • text segment
    • data
      • static data segment
      • relocation info
    • symbol table
    • debug info

  • link object modules (linker)

    • merge segment
    • resolve label into read addresses
    • patch location dependent and external references

  • what does loader do?

    • read header, determine segment size
    • create virtual address space
    • copy text and init data to memory
    • arguments in stack
    • init register
    • startup routine (jmp to main with arguments)
      • exiting from main calls exit syscall

  • Dynamic linking

    • only link the library when called
    • requires relocatable procedure code

  • sort precedure in c

    void swap(int v[], int j) { //swap v[j] and v[j+1]; }

    void sort(int v[], int n) { for (int i = 0; i<n; ++i) { for (int j=i-1; j>-0 && v[j] > v[j+1]; --j) { swap(v, j); } } }

  • array vs pointer

    • accessing with array index requires shift the cast into the address.
    • using pointers can remove indexing complexity (overhead)
    • we can reduce the # instruction in the loop

  • compare and branch in ARM ISA

    • condition code (negative, zero, carry, overflow bit)